Substrates that include one or more layers of semiconductor material are used to form a wide variety of semiconductor structures and devices including, for example, integrated circuit (IC) devices (e.g., logic processors and memory devices), radiation-emitting devices (e.g., light-emitting diodes (LEDs), resonant cavity light-emitting diodes (RCLEDs), and vertical cavity surface-emitting lasers (VCSELs)), and radiation sensing devices (e.g., optical sensors). Such semiconductor devices are conventionally formed in a layer-by-layer manner (i.e., lithographically) on and/or in a surface of a semiconductor substrate.
Historically, a majority of such semiconductor substrates that have been used in the semiconductor device manufacturing industry have comprised thin discs or “wafers” of silicon material. Such wafers of silicon material are fabricated by first forming a large generally cylindrical silicon single crystal ingot and subsequently slicing the single crystal ingot perpendicularly to its longitudinal axis to form a plurality of silicon wafers. Such silicon wafers may have diameters as large as about thirty centimeters (30 cm) or more (about twelve inches (12 in) or more). Although silicon wafers generally have thicknesses of several hundred microns (e.g., about 700 microns) or more, only a very thin layer (e.g., less than about three hundred nanometers (300 nm)) of the semiconductor material on a major surface of the silicon wafer is actually used to form active devices on the silicon wafer.
It has been discovered that the speed and power efficiency of semiconductor devices can be improved by electrically insulating the portion of the semiconductor material on a semiconductor substrate that is actually used to form the semiconductor devices from the remaining bulk semiconductor material of the substrate. As a result, so-called “engineered substrates” have been developed that include a relatively thin layer of semiconductor material (e.g., a layer having a thickness of less than about three hundred nanometers (300 nm)) disposed on a layer of dielectric material (e.g., silicon dioxide (SiO2), silicon nitride (Si3N4), or aluminum oxide (Al2O3)). Optionally, the layer of dielectric material may be relatively thin (e.g., too thin to enable handling by conventional semiconductor device manufacturing equipment), and the semiconductor material and the layer of dielectric material may be disposed on a relatively larger host or base substrate to facilitate handling of the overall engineered substrate by manufacturing equipment. As a result, the base substrate is often referred to in the art as a “handle” or “handling” substrate. The base substrate may also comprise a semiconductor material other than silicon.
A wide variety of engineered substrates are known in the art and may include semiconductor materials such as, for example, silicon (Si), germanium (Ge), III-V type semiconductor materials, and II-VI type semiconductor materials.
For example, an engineered substrate may include an epitaxial layer of III-V type semiconductor material formed on a surface of a base substrate, such as, for example, aluminum oxide (Al2O3) (which may be referred to as “sapphire”). Using such an engineered substrate, additional layers of material may be formed and processed (e.g., patterned) over the epitaxial layer of III-V type semiconductor material to form one or more devices on the engineered substrate.
Strain in semiconductor layers, for example, in III-nitride materials, can be undesirable for a number of reasons. Strained layers generally result in an increased density of defects/dislocations and may even result in crack formation in films. For example, strain effects are a major detriment to high indium content InGaN light-emitting devices as the increased indium percentage required for such devices introduces elevated strain levels. These layers can only be grown at extremely small thicknesses and low indium content to prevent the onset of phase separated material and the resulting non-uniform distribution of indium through the layer, making for an impractical approach for achieving material goals.
One way strain is induced is through the temperature changes that semiconductor layers may experience during processing. When a layer of semiconductor material is formed (e.g., epitaxially grown) over another layer of material (e.g., an underlying layer of a different semiconductor material) at elevated temperatures, as the resulting structure cools to room temperature lattice strain may be induced in the crystal lattice of the layer of semiconductor material due to any difference in the coefficients of thermal expansion (CTE) exhibited by the respective adjacent materials. If the underlying material exhibits a coefficient of thermal expansion that is higher than the coefficient of thermal expansion exhibited by the semiconductor material, the semiconductor material may be disposed in a state of compressive strain upon cooling the resulting structure. In contrast, if the underlying material exhibits a coefficient of thermal expansion that is less than the coefficient of thermal expansion exhibited by the semiconductor material, the semiconductor material may be disposed in a state of tensile strain upon cooling the resulting structure. There are various semiconductor devices and processes in which such lattice strain imposes limitations on the devices that can be fabricated.
The use of relaxed (i.e., unstrained) GaN as a seed for the growth of InGaN/AlGaN films is limited to extremely small thicknesses and low indium/aluminum content to prevent, in the case of InGaN, the onset of phase separated material and the resulting non-uniform distribution of indium through the layer or, in the case of AlGaN, the possible cracking of films. As an example, films with an indium content larger than 7% are difficult to grow thick (i.e., >500 nm) as the film can phase separate and hence be degraded by lattice mismatch induced strain effects.
In view of the above, there is a need for a substrate technology providing the appropriate lattice parameter to reduce or cancel the lattice mismatch with epitaxial film that will be grown or deposited thereon.